1. Field of the Invention
The present invention relates generally to digital filters.
2. Description of the Related Art
Digital filtering is a powerful engineering tool that is typically realized with digital signal processors (DSPs). In contrast to analog filters which generate filter errors for a variety of hardware-associated reasons (e.g., component fluctuations over time and temperature in passive filters and operational amplifier drift in active filters), digital filters virtually eliminate filter errors and are capable of performance specifications that are difficult to achieve with an analog implementation.
Analog filter design is directed to frequency domain multiplication of an input signal spectrum by the filter's transfer function. In contrast, digital filter design is carried out in the time domain with the equivalent process of convolving a quantized input signal with the filter's quantized impulse response. Digital filters, therefore, are generally associated with sampled data systems in which an input signal and the filter's impulse response are quantized in time and amplitude to provide discrete samples. The quantized input signal samples are provided by the system (e.g., by an analog-to-digital converter) and the impulse response samples (referred to as the filter's coefficients) are generally stored in memory.
An exemplary digital filter design initially establishes a desired frequency response, then determines the equivalent impulse response and finally quantizes this impulse response to find the filter coefficients. If the impulse response is time limited, the resulting digital filter is referred to as a finite impulse response (FIR) filter. Infinite impulse response (IIR) filters, in contrast, are recursive in form (i.e., they involve feedback) and their impulse response extends for an infinite time period. Although they can generally be realized with fewer operations, IIR filters typically do not match the filter performance of FIR filters (e.g., they cannot be designed to realize a linear phase response).
As stated above, digital filters convolve a quantized input signal with the filter's quantized impulse response. If quantized samples of an input data stream Din are expressed as x(n), the convolution is given by                               y          ⁡                      (            n            )                          =                              ∑                          k              =              0                                      N              -              1                                ⁢                                    a              k                        ⁢                          x              ⁡                              (                                  n                  -                  k                                )                                                                        (        1        )            wherein ak are the filter coefficients, N is defined below with respect to FIG. 1 and the convolution generates quantized elements y(n) of the filter's output data stream Dout.
FIG. 1 illustrates an exemplary FIR filter structure 20 that realizes the convolution of equation (1). In this filter, an input data stream Din at an input port 22 is passed through a string of delay elements 24 (e.g., buffer registers) that are labeled Z−1 to correspond to conventional z-transform delay element representation. Accordingly, the quantized input signals that travel along the string are shown as x(n), x(n−1) - - - x(n−5) to indicate their relative sample time in the input data stream Din. These quantized input data elements are multiplied by corresponding filter coefficients a0, a1 - - - a5 in respective multipliers 26 and the products summed in summers 28 to form quantized output signals y(n) in an output data stream Dout at the filter's output port 30.
Digital filters are typically realized with DSPs that are programmed to perform the exemplary delays, multiplications and summations of FIG. 1. The filter structure associated with each filter coefficient is typically referred to as a filter “tap” and N in equation (1) defines the number of taps in the filter. For example, the digital filter 20 of FIG. 1 is a 5-tap filter.
If a DSP is realizing the processes of the digital filter 20 of FIG. 1, it receives input data elements x(n) at a system rate Fs and must execute all process steps of the filter routine in each clock period 1/Fs if it is to maintain real-time operation. It is apparent from FIG. 1 that each tap requires a corresponding multiply-accumulate operation so that N multiply-accumulate operations (plus overhead operations) must be completed during each clock period 1/Fs. Although DSPs are generally optimized to perform fast multiply-accumulate operations, the system rate Fs is limited by the execution time of the processor and that it decreases as the number of taps N increases.
Therefore, the structure of the digital filter 20 of FIG. 1 imposes an upper bound on the operating frequency of a system that includes the filter. For example, it is presently difficult to realize complementary metal-oxide semiconductor (CMOS) digital filters that can operate at a 1 GHz system rate and such operation generally requires extensive pipelining structures in the filter's multipliers and summers.